Port declaration

## Contents

- Your rights

- Introduction

- Component model

- Component description file

  - Preprocessing

  - Elements of a description file

  - Data type and constant definitions

  - Module declaration

  - Component declaration

  - Interface declaration

  - IDS declaration

  - Port declaration

  - Task declaration

  - Service declaration

  - Codel declaration

  - Identifiers and reserved keywords

  - Pragmas

  - Grammar reference

- GenoM IDL mappings

- Running GenoM

- Tutorials

- Templates

## Port declaration

Ports implement the data flow between components as a publish/subscribe model. Ports have a name and a type. They can be either `out` ports (for publishing data) or `in` ports (for subscribing to a sibling `out` port).

(23) `port ::=` | `"port"` `opt-multiple` `port-dir` `type-spec` `identifier` `opt-properties` `";"`
(25) `opt-multiple ::=` | `[` `"multiple"` `]`
(24) `port-dir ::=` | `"in"` `|` `"out"`

Ports are by default `single` ports, i.e. they define one type of exported data. The optional `multiple` qualifier can be used to define a 'dynamic list' of ports of the given type, instead of a single slot. Suchs ports are accessed as an array indexed by strings. In this case, ports are created or destroyed dynamically be the codels. The IDL mappings section for ports explains how this is done.